NEURON
nrniv_decl.h
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1 /*
2 # =============================================================================
3 # Copyright (c) 2016 - 2021 Blue Brain Project/EPFL
4 #
5 # See top-level LICENSE file for details.
6 # =============================================================================.
7 */
8 
9 #pragma once
10 
11 #include <vector>
12 #include <map>
14 namespace coreneuron {
15 
16 /// Mechanism type to be used from legacy_index2pointer and nrn_dblpntr2nrncore (in Neuron)
17 /// Values of the mechanism types should be negative numbers to avoid any conflict with
18 /// mechanism types of Memb_list(>0) or time(0) passed from Neuron
19 enum mech_type { voltage = -1, i_membrane_ = -2 };
20 
21 extern bool cvode_active_;
22 /// Vector of maps for negative presyns
23 extern std::vector<std::map<int, PreSyn*>> neg_gid2out;
24 /// Maps for ouput and input presyns
25 extern std::map<int, PreSyn*> gid2out;
26 extern std::map<int, InputPreSyn*> gid2in;
27 
28 /// InputPreSyn.nc_index_ to + InputPreSyn.nc_cnt_ give the NetCon*
29 extern std::vector<NetCon*> netcon_in_presyn_order_;
30 /// Only for setup vector of netcon source gids and mindelay determination
31 extern std::vector<int*> nrnthreads_netcon_srcgid;
32 /// Companion to nrnthreads_netcon_srcgid when src gid is negative to allow
33 /// determination of the NrnThread of the source PreSyn.
34 extern std::vector<std::vector<int>> nrnthreads_netcon_negsrcgid_tid;
35 
36 extern void mk_mech(const char* path);
37 extern void set_globals(const char* path, bool cli_global_seed, int cli_global_seed_value);
38 extern void mk_netcvode(void);
39 extern void nrn_p_construct(void);
40 extern double* legacy_index2pointer(int mtype, int index, NrnThread&);
42 extern void nrn_cleanup();
43 extern void nrn_cleanup_ion_map();
44 extern void BBS_netpar_solve(double);
45 extern void nrn_mkPatternStim(const char* filename, double tstop);
46 extern int nrn_extra_thread0_vdata;
47 extern void nrn_set_extra_thread0_vdata(void);
49 extern int nrnmpi_spike_compress(int nspike, bool gidcompress, int xchng);
50 extern bool nrn_use_bin_queue_;
51 extern std::vector<int>& nrn_mech_random_indices(int type);
52 
53 extern void nrn_outputevent(unsigned char, double);
54 extern void ncs2nrn_integrate(double tstop);
55 
56 extern void handle_forward_skip(double forwardskip, int prcellgid);
57 
58 extern int nrn_set_timeout(int);
59 extern void nrn_fake_fire(int gid, double spiketime, int fake_out);
60 
61 extern void netpar_tid_gid2ps(int tid, int gid, PreSyn** ps, InputPreSyn** psi);
62 extern double set_mindelay(double maxdelay);
63 
64 extern int nrn_soa_padded_size(int cnt, int layout);
65 
66 extern int interleave_permute_type;
67 extern int cellorder_nwarp;
68 
69 // Mechanism pdata index values into _actual_v and _actual_area data need to be updated.
70 enum Layout { SoA = 0, AoS = 1 };
71 
72 // Blocks associated with BEFORE and AFTER have different values based on type.
73 // There values are based on neuron/coreneuron implementation details.
74 struct BAType {
75  enum { Breakpoint = 1, Solve = 2, Initial = 3, Step = 4, Before = 10, After = 20 };
76 };
77 } // namespace coreneuron
#define cnt
Definition: tqueue.hpp:44
THIS FILE IS AUTO GENERATED DONT MODIFY IT.
void nrn_set_extra_thread0_vdata()
Definition: patternstim.cpp:48
void nrn_cleanup()
Definition: nrn_setup.cpp:725
bool nrn_use_bin_queue_
Flag to use the bin queue.
Definition: netcvode.cpp:39
int cellorder_nwarp
void handle_forward_skip(double forwardskip, int prcellgid)
Definition: main1.cpp:358
mech_type
Mechanism type to be used from legacy_index2pointer and nrn_dblpntr2nrncore (in Neuron) Values of the...
Definition: nrniv_decl.h:19
void mk_netcvode()
Definition: netcvode.cpp:41
std::map< int, InputPreSyn * > gid2in
Definition: nrn_setup.cpp:160
int nrn_set_timeout(int timeout)
Definition: netpar.cpp:598
std::vector< int > & nrn_mech_random_indices(int type)
int nrn_extra_thread0_vdata
Definition: patternstim.cpp:46
void netpar_tid_gid2ps(int tid, int gid, PreSyn **ps, InputPreSyn **psi)
Definition: nrn_setup.cpp:233
bool cvode_active_
Definition: netcvode.cpp:36
int interleave_permute_type
std::vector< std::map< int, PreSyn * > > neg_gid2out
Vector of maps for negative presyns.
Definition: nrn_setup.cpp:157
std::vector< std::vector< int > > nrnthreads_netcon_negsrcgid_tid
If a nrnthreads_netcon_srcgid is negative, need to determine the thread when in order to use the corr...
Definition: nrn_setup.cpp:170
void set_globals(const char *path, bool cli_global_seed, int cli_global_seed_value)
Definition: global_vars.cpp:43
void BBS_netpar_solve(double tstop)
Definition: netpar.cpp:604
Point_process * nrn_artcell_instantiate(const char *mechname)
std::vector< int * > nrnthreads_netcon_srcgid
Only for setup vector of netcon source gids.
Definition: nrn_setup.cpp:166
void delete_trajectory_requests(NrnThread &nt)
Definition: nrn_setup.cpp:905
void nrn_outputevent(unsigned char, double)
void nrn_p_construct()
Definition: netcvode.cpp:175
static void mk_mech()
Definition: mk_mech.cpp:68
double set_mindelay(double maxdelay)
Definition: netpar.cpp:643
void ncs2nrn_integrate(double tstop)
Definition: netcvode.cpp:488
int nrn_soa_padded_size(int cnt, int layout)
calculate size after padding for specific memory layout
double * legacy_index2pointer(int mtype, int index, NrnThread &nt)
Definition: nrn_setup.cpp:643
std::vector< NetCon * > netcon_in_presyn_order_
InputPreSyn.nc_index_ to + InputPreSyn.nc_cnt_ give the NetCon*.
Definition: nrn_setup.cpp:163
void nrn_fake_fire(int gid, double spiketime, int fake_out)
Definition: netpar.cpp:578
std::map< int, PreSyn * > gid2out
Maps for ouput and input presyns.
Definition: nrn_setup.cpp:159
void nrn_mkPatternStim(const char *fname, double tstop)
Definition: patternstim.cpp:60
void nrn_cleanup_ion_map()
Cleanup global ion map created during mechanism registration.
Definition: nrn_setup.cpp:707
int nrnmpi_spike_compress(int nspike, bool gid_compress, int xchng_meth)
Definition: netpar.cpp:753
static char * mechname
Definition: nocpout.cpp:137
short type
Definition: cabvars.h:10
Represent main neuron object computed by single thread.
Definition: multicore.h:58
A point process is computed just like regular mechanisms.
Definition: section_fwd.hpp:77